Low-power Application-specific Parallel Array Multiplier Design for DSP Applications
نویسندگان
چکیده
منابع مشابه
Low-power Application-specific Parallel Array Multiplier Design for DSP Applications
Digital Signal Processing (DSP) often involves multiplications with a fixed set of coefficients. This paper presents a novel multiplier design methodology for performing these coefficient multiplications with very low power dissipation. Given bounds on the throughput and the quantization error of the computation, our approach scales the original coefficients to enable the partitioning of each m...
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Digital Signal Processing (DSP) often involves multiplications with a set of coefficients. This paper presents a novel multiplier design methodology for performing these coefficient multiplications with very low power dissipation. Given bounds on the throughput and the quantization error, our approach scales the original coefficients to enable the partitioning of each multiplication into a coll...
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ژورنال
عنوان ژورنال: VLSI Design
سال: 2002
ISSN: 1065-514X,1563-5171
DOI: 10.1080/10655140290011087